Classes are subject to change at any time. Any course may be withdrawn from the current listing if the enrollment is too small to justify conducting the course or as a result of a reduction in funding.
| EE 2305 | Electric Circuits I Hours: 3 |
| 001 | 20656 | TR 8:00a-9:15a Location: UC 242 Morsy, Mohamed | 20 | 16 | |
| Meets 1/16/2018 – 5/9/2018 Vita SyllabusPrerequisites: Lvl UG MATH 2413 Min Grade D Campus: Main Campus (Texarkana, TX) Instructional Method: FACE | |
| EE 319 | Electric Circuits II (EL) Hours: 3 |
| 001 | 21111 | MW 1:30p-2:45p Location: SCIT 306 Morsy, Mohamed | 24 | 4 | |
| Meets 1/16/2018 – 5/9/2018 Vita SyllabusThis course integrates the principles of experiential
learning and meets the criteria for undergraduate research.
Prerequisites: Lvl UG EE 2305 Min Grade D and Lvl UG MATH 2414 Min Grade D Campus: Main Campus (Texarkana, TX) Instructional Method: FACE | |
| EE 321 | Digital Logic Hours: 3 |
| 001 | 20026 | TR 11:00a-12:15p Location: SCIT 215 Lala, Parag | 24 | 24 | |
| Meets 1/16/2018 – 5/9/2018 Vita SyllabusPrerequisites: Lvl UG MATH 1314 Min Grade D or Lvl UG MATH 1316 Min Grade D or Lvl UG MATH 2413 Min Grade D or Lvl UG MATH 2414 Min Grade D Campus: Main Campus (Texarkana, TX) Instructional Method: FACE | |
| EE 325 | Signals and Systems I Hours: 3 |
| 001 | 20040 | TR 1:30p-2:45p Location: SCIT 214 Rauf, Fawad | 20 | 11 | |
| Meets 1/16/2018 – 5/9/2018 Vita SyllabusCorequisites C: EE 326 Prerequisites: (Lvl UG EE 2305 Min Grade D and Lvl UG MATH 2413 Min Grade D) Campus: Main Campus (Texarkana, TX) Instructional Method: FACE | |
| EE 326 | Signals and Systems I Lab Hours: 1 |
| 01L | 20041 | W 3:00p-5:45p Location: SCIT 215 Rauf, Fawad | 20 | 11 | |
| Meets 1/16/2018 – 5/9/2018 Vita SyllabusCorequisites C: EE 325 Prerequisites: Lvl UG EE 2305 Min Grade D and Lvl UG MATH 2413 Min Grade D Campus: Main Campus (Texarkana, TX) Instructional Method: FACE | |
| EE 336 | Electronics Laboratory Hours: 1 |
| 01L | 20042 | R 4:00p-6:45p Location: SCIT 214 Morsy, Mohamed | 20 | 9 | |
| Meets 1/16/2018 – 5/9/2018 Vita SyllabusPrerequisites: Lvl UG EE 335 Min Grade D Campus: Main Campus (Texarkana, TX) Instructional Method: FACE | |
| EE 455 | Digital Circuit Testing Hours: 3 |
| 001 | 20540 | TR 9:30a-10:45a Location: SCIT 213 Lala, Parag | 20 | 10 | |
| Meets 1/16/2018 – 5/9/2018 Vita SyllabusPrerequisites: Lvl UG EE 321 Min Grade D Campus: Main Campus (Texarkana, TX) Instructional Method: FACE | |
| EE 465 | VLSI Design Hours: 3 |
| 01E | 21175 | W 9:00a-11:45a Location: SCIT 213 Lala, Parag | 20 | 16 | |
| Meets 1/16/2018 – 5/9/2018 Vita SyllabusPrerequisites: Lvl UG EE 321 Min Grade D Campus: Main Campus (Texarkana, TX) Instructional Method: WEE | |
| EE 491 | EE Senior Design II Hours: 3 |
| 001 | 20541 | F 9:00a-11:45a Location: SCIT 101 Rauf, Fawad | 20 | 9 | |
| Meets 1/16/2018 – 5/9/2018 Vita SyllabusCross listed with CS 491-001.
Prerequisites: Lvl UG EE 490 Min Grade D Campus: Main Campus (Texarkana, TX) Instructional Method: FACE | |